1. Field of the Invention
The present invention relates to a thin-film transistor operable at a high voltage and a method for manufacturing the same.
2. Description of the Related Art
A miniaturization of MOS-type field effect transistors becomes important, as the integration density increases. For area saving, a MOS-type thin-film field effect transistor was devised to use a step portion as its channel portion (see IEEE Transactions on Electron Devices, Vol. ED-32, No. 2 (Feb. 1985), pages 258 to 281). The structure of such thin-film transistor will be explained with reference to FIG. 1 showing a sectional view of the prior art transistor.
The MOS-type thin-film transistor is formed on a first insulating film 1 which may be a thin film formed on other substrate or a surface portion of an insulating substrate. A gate electrode 2 is formed on the first insulating film 1 with a polycrystalline silicon. A second insulating film 3 is formed on the upper and side surfaces of the gate electrode 2 so as to be used as a gate insulating layer. A polycrystalline silicon film 4 is deposited over the step portion at the edge of the gate electrode 2 so as to continuously contact with the surface of the first insulating film 1 and side and upper surfaces of the second insulating film 3. Source region 6 and drain region 7 are formed by implanting impurities. The vertical portion of the polycrystalline silicon layer 4 functions as a channel region 8.
Such MOS thin-film transistor is formed by using ion-implantation to form the source and drain regions 6 and 7. The channel region 8 has the same thickness as the polycrystalline silicon film 4. Additionally, the gate electrode 2 has a small thickness. Therefore, the drain region 7 positions very close to the source region 6, resulting in a small withstand voltage applicable to the drain region and a large leakage current flowing between the source and drain regions through the channel region.